Generating the required clocks for stereo & RDS

[Albert H]

I found a circuit in an old notebook the other day, which used the usual 4.332MHz crystal for RDS and some CMOS logic to derive the frequencies needed for an oversampled stereo coder and oversampled pilot generator, with exactly correct phase relationships. There's also another version that's based on a 4.864MHz stereo coder crystal, and derives all the required frequencies as above. If anyone's interested (and I'm not going to be accused of plagiarism) I'll put them up here. One version was originally designed for something that became an Inovonics product.

There's also a version that's based on a 6MHz crystal, but I can't quite get the glitches out of the 57kHz without adding a further PLL.

[3metrejim]

Bob's notebook? Only kidding.

If it's anything other than hanging a 57kHz 4046 and a 4017 as a divide by 3 off the 19Khz from an existing oscillator and divider, I'll be surprised. Maybe you'll add another divide by 16 from the 19kHz (from the 4017 output) to get 1187.5 Hz RDS data clock. I'm only saying that, because that's how I did it. The only problem was getting the resistor for the 4046 centre frequency right, the tolerance on the oscillator in those things is awful (go from the graph? You're havin' a laugh).

[radium98]

nice

[Albert H]

Jim - not quite - the circuit uses some programmed 4040s (and a 4046) to give a bunch of useful frequencies, all phase locked together. I buffered the outputs with either a 4050 or a 4049, and also have the option of (easily) adding the third harmonic frequencies that I now use in my harmonic cancelling stereo switching coder. This could - I suppose - be considered to be the Pro V Stereo Coder. I've usedf the FDNR approach to designing the 15kHz elliptic filter, with minimal passband ripple and a response that falls away above 15 kHz really steeply.

Incidentally, I've seldom had much problem with getting the VCO in the 4046 in the right vicinity (partially using "the graph"). If there's much issue, it's usually because the capacitor between pins 6 and 7 is NOT the marked value. Cheap ceramic capacitors (in particular) are hopelessly inaccurate! If I'm ever going to use one in a frequency critical circuit, I'll test a few to find the closest to the value I actually want....

[3metrejim]

Bob (yes, his real name) has some very similar schematics and technical manuals for Inovonics products.

Page from Bob's notebook here: https://www.qsl.net/yo4hfu/Stereo_coder_sampling.html (scroll right to the bottom)

A circuit similar to what you describe is this one: https://www.qsl.net/yo4hfu/Files/STEREO/PLL_encoder.pdf (just add dividers for 57kHz)

If you already have a stereo coder (which you probably do if you need 57kHz), adding the 57kHz is the easiest route, but take the 19kHz from a point after it has been adjusted for phase shift - example for the old Pro III coder is to take it from before it is mixed in the final stage. If you have a final inverting op-amp mixer before any filtering, make sure to invert the 19KHz too. The sig-in input to the 4046 is nice and sensitive so no need for a logic level square wave input. Starting with a 4.332MHz crystal would really only be useful if you were planning to make an all-in-one stereo / RDS coder, or really couldn't get a 4.864MHz crystal, and there doesn't seem to be much of a shortage these days.

Ceramic capacitors are not very accurate, i definitely agree on that, and probably why a lot of mylar film capacitors are used for higher values and if you don't want something that drifts about with temperature or has microphonic tendencies.

[Albert H]

YO4HFU (Robert-Christian) was the first Romanian amateur I ever talked to on 144MHz, when I was operating for the first time in that part of the world. I was unaware of his interest in the subtleties of stereo coding, but his webpage about his investigations is interesting. Many of his conclusions are similar to mine, but I should drop him a line and make him aware of some of the work that we've been doing in the same realm.

The PLL generator he describes is close to ours - though we generate 57 kHz coherently and also a group of third harmonic clocks for the harmonic image nulling we're now employing.

You're right about the 4046 signal input - it's pretty sensitive (and also sensitive to harmonic products, by the way). I've been using the 7046 PLL latterly - it has some interesting properties that make it a significant enhancement on the old favourite 4046, including a lock detector that really works!

I still prefer my discrete logic phase comparator, though. It's made with a 74HC74 and NAND gates, and gives a really reliable lock detect output which I use for carrier switching (through a suitable delay network). The phase comparator done this way doesn't have the "dead zone" issues of the simple EX-OR phase comparator frequently found in the cheaper "all-in-one" PLL ICs.

However, I recently found a couple of boards from the early 80s (possibly even earlier) that use a Plessey ÷100 ECL prescaler and the CB rig favourite MC145106 and an extra dual bistable to give a cheap 3-chip solution to Band II (and part of Band III) synthesis. There's another one that uses the PLL02 (another CB favourite), and a mixer circuit using the multiplied reference crystal to add to the synthesised 100 kHz HF signal, then fed to a filter (to get rid of the unwanted image), then into the amplifier stages (with a BLY90 final!). Despite the fairly critical alignment required, it was a single chip synthesis method for Band II, and was probably one of the very first illicit Band II PLL rig designs!