Stable VFO 1w schematics

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OldskoolPirate
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Stable VFO 1w schematics

Post by OldskoolPirate » Tue Nov 21, 2017 11:58 pm

Any decent stable drawings of a 1w design ? Not pll, to much effort.
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Re: Stable VFO 1w schematics

Post by thewisepranker » Wed Nov 22, 2017 9:24 am

There's no such thing!

Albert H
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Re: Stable VFO 1w schematics

Post by Albert H » Wed Nov 22, 2017 10:53 am

Way back in the 80s, several of us had a competition to see who could build the most stable and cleanest VFO for Band II. We allowed frequency multiplication and the target power was 1 Watt. The tests we did on each board included temperature cycling - in the freezer for half an hour, then under a bench lamp until it reached about 35C. None of us could get better than about 50 kHz over that temperature range, and we'd spent a lot of time getting all the temperature coefficients of the components to cancel each other out....

The best circuit came from Michael at RFM - it used a half frequency dual-gate MOSFET (BF981) driving into a bipolar transistor (BFR96) with a twin-tuned collector circuit to double the signal frequency into a driver transistor (BF199) then a 2N4427 for the Watt out. He used carefully selected and tested NPO capacitors in the oscillator circuit, and a diode for gain-levelling. The board had five adjustment points and required an analyser to get it right.

Over the temperature cycle test, it wandered about 50kHz - which would be completely unacceptable with a digitally tuned receiver. An older analogue-tuned receiver would have an "AFC" circuit which would allow it to track the drifting signal, but this doesn't happen today.

PLL circuits are trivially simple to get right these days. The components don't have to cost a lot, and the stability will be comparable to that of the reference crystal (multiplied by the PLL multiplication factor). A 4 MHz crystal costs about 30p and will be stable to within a few Hz over quite a wide temperature range, so your output frequency will easily be accurate to within 1 kHz. If you can't be bothered to work out the diode programming for a 74HC4040, you can buy cheap TSA5511 or SA1057 ICs and programme a PIC to load the data into the PLL IC at power on. It's just two cheap ICs and a quick programming job.

My latest VCO / amplifier PLL circuit costs about £9 to build (plus box), delivers either 800mW or 2 W according to output device and is set to one frequency by a programmed 8-pin PIC (to change frequency, you have to change the chip). It has just two adjustments and fits into a small Eddystone diecast box.
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Re: Stable VFO 1w schematics

Post by sinus trouble » Fri Nov 24, 2017 10:14 pm

I would have to go with the NRG 1watt VFO everytime!
Tricky to tune bang on frequency? But at least you wont finish up at the other end of the dial after a few hours!
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Re: Stable VFO 1w schematics

Post by Albert H » Fri Nov 24, 2017 11:49 pm

Sinus - try the temperature cycle test. Put it in the fridge for ½-an-hour, then fire it up into a dummy load and measure the frequency. Now put a desk lamp near it to warm it up to a bit more than room temperature. Just watch the counter change as it warms up!

If you have a rig on a rooftop, you could get down to -5C at night and up to +15C in the daytime. If it's crystal controlled (and a good design), you could get as little as 1 or 2 kHz change at the output frequency. This degree of stability just isn't possible with a free-running oscillator.

Remember - most receivers are crystal-controlled these days, and just won't tolerate any drift.
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Re: Stable VFO 1w schematics

Post by OldskoolPirate » Sat Nov 25, 2017 4:26 am

Between temperatures of -5 and 15c, how much drift are we talking ? 50khz or so is not going to matter that much.
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Re: Stable VFO 1w schematics

Post by sinus trouble » Sat Nov 25, 2017 7:04 pm

I have no doubt we can both agree that Albert and WP are 100% correct!
However, It depends on your intentions? -5 to 15c is quite extreme and would be something you have to consider in a professional installation!
I am assuming that your 'experimental' VFO will be in a nice warm house? Not facing the extreme weather? Or driving any sort of amplifier? Just a guess!
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Re: Stable VFO 1w schematics

Post by Albert H » Mon Nov 27, 2017 2:53 am

OldskoolPirate wrote: Sat Nov 25, 2017 4:26 am Between temperatures of -5 and 15c, how much drift are we talking ? 50khz or so is not going to matter that much.
50kHz drift will move the signal out of the passband of a modern digital receiver - or make reception very distorted at least. PLL technology is so cheap and simple these days that it really doesn't make sense to try to avoid using it.

I was recently asked for a small pile of 20 Watt, single box rigs. They had to be compact, passively cooled, mains powered, clean and stable. I bought in 25 16F84 PICs, 25 SAA1057 PLL ICs, and 25 4 MHz crystals. The whole lot cost just £30.

These little rigs have pairs of RD15HVF FETs running cold in parallel, and use a simple 2 FET 3 transistor exciter. The PSUs are little SMPSUs that were intended for set-top boxes and are rated at 35VA output, so they also run cold and from any mains voltage you feed to them. Under-running the output FETs makes them virtually indestructible. They have a band pass filter between the exciter and the PA, and a lowpass filter on the end of the rig. There are no artefacts bigger than -70dBc, and the rigs deliver exactly 20 Watts wherever they're tuned to in Band II.

I considered what I'd save if I left out the PLL - the exciter could be a bit smaller, there would be about 30 less parts, and I'd have to spend ages with each one to select components for the oscillator to get any kind of stability. It's MUCH easier to include a PLL!
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